The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. However, these advances have increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed. In the course of integrated circuit evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased.
As the semiconductor device sizes continue to shrink, it may be desirable to determine the focus and/or dose of a lithography apparatus used in a lithographic process. For example, the focus and dose associated with an exposure process may affect the shape and/or size of photoresist patterns formed on a substrate. Unfortunately, existing methods and apparatuses typically cannot provide an accurate estimation of both the actual focus and dose of an exposure process.
Therefore, while existing methods of determining dose and/or focus of an exposure process have been generally adequate for their intended purposes, they have not been entirely satisfactory in every aspect.